We’re picking a fight with a $20B industry whose debuggers suck and won’t open until an ancient license server gives them permission.
Today we’re launching Wave.
play launch videothe problem
The AI boom is a chip boom - more teams than ever are designing silicon. However, the reality is hardware is not software: you can’t patch a chip after it ships. A bug that reaches manufacturing can be a nine-figure mistake. That’s why teams spend more than half the entire design process on verification - and why nothing in it eats more hours than debug.
If a simulated test fails, debugging means reading a waveform - a log of every signal, millions of ticks long, hiding the tick where a value went wrong. It’s literally a needle in a haystack… a big haystack. It’s common for these waveform files to be several gigabytes large. Finding this needle is the single largest activity in verification.
The current tools are dinosaurs. 20-year-old GUIs behind license servers whose seats run six figures a year, sold by our favorite incumbents: Synopsys, Cadence, and Siemens.
Software engineers got coding agents. Chip engineers got a queue for a license and whatever this is.
what wave actually does
Wave is a terminal-native waveform debugger with a verification agent built in. It opens your dump before Verdi finishes its license check.
why the terminal? Most hardware engineers are terminal power users - typically doing all their coding in Vim. We wanted to meet them where they are and make our product extremely intuitive to use - we even employ Vim bindings across the interface.
every answer, pinned to evidence. Ask in plain English: “why is grant_valid x at 12.4us?” The agent pulls in the relevant signals, decodes them, and traces the bad value back to its source - right in the viewer, not in a wall of text.
See the exact signals, the exact ticks, and a transcript you can audit. And the agent runs where the viewer runs - on your machine, on your key. Your design never phones home.
pick your fix and see it. “Best fix” means something different on every design. Optimizing for performance? For power? For area? Wave proposes multiple fixes with their tradeoffs and lets you choose. Then it re-runs your failing test - your simulator, your flow, not ours - reads the new dump, and shows you a diff: exactly how the waves changed, and exactly where the fix landed.
watch it work. Here’s Rishov fixing a real bug end to end:
play demobook a demo →join the waitlist ↓
the two of us
We met in our freshman dorm at Georgia Tech nearly a decade ago! We became best friends and roommates for all four years of college - after, Athreya went to NYC to work at Google and Rishov stayed to do his PhD. We promised each other that once we’re free, that we’ll go all-in and work on something we’re passionate about together. Turns out, Rishov’s deep PhD thesis on chip simulation and compilers was the perfect spark.
Today, we’re backed by Y Combinator - and we’re roommates once again ❤️
say hi 👋
If you design or verify chips - ASICs or FPGAs - we want Wave in your terminal. Join the waitlist below, or email us at [email protected] - we read everything.
If you lead a team, we’re onboarding pilot teams now. Book a demo and we’ll fix a real bug live on the call.