We’re Athreya and Rishov, the founders of hardware intelligence. We’re here to pick a fight with a $20B industry whose debuggers won’t even open until an ancient license server gives them permission.
Today we’re launching Wave.
the problem
The AI boom is a chip boom — more teams than ever are designing silicon. But you can’t patch a chip after it ships: a bug that reaches manufacturing can be a nine-figure mistake. That’s why teams spend more than half the entire design process on verification — and why nothing in it eats more hours than debug.
When a test fails, the evidence is a waveform: a log of every signal in the design, millions of ticks long, hiding the one tick where a value went wrong. A needle in a haystack, except the haystack is several gigabytes and missing the needle costs you a tapeout. And the tools you’re given for the job? Dinosaurs. Twenty-year-old GUIs with seats that run six figures a year, sold by the usual suspects: Synopsys, Cadence, Siemens.
Software engineers got coding agents. Chip engineers got a queue for a license and whatever this is.
what wave actually does
Wave is a terminal-native waveform debugger with a verification agent built in. It opens your dump before Verdi finishes its license check.
Why the terminal? Because that’s where you already live. You write your RTL in Vim, you kick off regressions over SSH — and then you’re forced to alt-tab into a GUI from another decade. Wave meets you where you are, and it speaks fluent Vim.
every answer, pinned to evidence. Ask in plain English: “why is grant_valid x at 12.4us?” The agent pulls in the relevant signals, decodes them, and traces the bad value back to its source — right in the viewer, not in a wall of text.
Pinned, as in: the exact signals, the exact ticks, a transcript you can audit. And the agent runs where the viewer runs — on your machine, on your key. Your design never phones home.
watch it work. Here’s Rishov fixing a real bug end to end:
▶ play demobook a demo →join the waitlist ↓
pick your fix and see it. “Best fix” means something different on every design. Optimizing for performance? For power? For area? Wave proposes multiple fixes with their tradeoffs and lets you choose. Then it re-runs your failing test — your simulator, your flow, not ours — reads the new dump, and shows you a diff: exactly how the waves changed, and exactly where the fix landed. It’s the back half of the video above. (In a pilot, we wire it into your commands.)
the two of us
We met in our freshman dorm at Georgia Tech nearly a decade ago and were roommates for all four years. After graduation, Athreya went to Google; Rishov stayed for a PhD on chip simulation and compilers. That PhD was the spark.
We’re backed by Y Combinator — and we’re roommates once again.
say hi 👋
If you design or verify chips — ASICs or FPGAs — we want Wave in your terminal. Join the waitlist below, or email us at [email protected] — we read everything.
If you lead a team, we’re onboarding pilot teams now. Book a demo and we’ll fix a real bug live on the call.